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rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a amp04 functional block diagram in(? in(+) input buffers ref 100k 11k 11k r gain v out 100k features single supply operation low supply current: 700 a max wide gain range: 1 to 1000 low offset voltage: 150 v max zero-in/zero-out single-resistor gain set 8-lead mini-dip and so packages applications strain gages thermocouples rtds battery-powered equipment medical instrumentation data acquisition systems pc-based instruments portable instrumentation precision single supply instrumentation amplifier general description the amp04 is a single-supply instrumentation amplifier designed to work over a +5 volt to 15 volt supply range. it offers an excellent combination of accuracy, low power con- sumption, wide input voltage range, and excellent gain performance. gain is set by a single external resistor and can be from 1 to 1000. input common-mode voltage range allows the amp04 to handle signals with full accuracy from ground to within 1 volt of the positive supply. and the output can swing to within 1 volt of the positive supply. gain bandwidth is over 700 khz. in addi- tion to being easy to use, the amp04 draws only 700 a of supply current. for high resolution data acquisition systems, laser trimming of low drift thin-film resistors limits the input offset voltage to under 150 v, and allows the amp04 to offer gain nonlinearity of 0.005% and a gain tempco of 30 ppm/ c. a proprietary input structure limits input offset currents to less than 5 na with drift of only 8 pa/ c, allowing direct con- nection of the amp04 to high impedance transducers and other signal sources. the amp04 is specified over the extended industrial (?0 c to +85 c) temperature range. amp04s are available in plastic and ceramic dip plus so-8 surface mount packages. contact your local sales office for mil-std-883 data sheet and availability. pin connections 8-lead epoxy dip (p suffix) 8-lead narrow-body so (s suffix) 1 2 3 4 8 7 6 5 amp04 r gain v+ v out ref r gain in +in v amp04 v+ r gain v out ref r gain in +in v one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 world wide web site: http://www.analog.com fax: 781/326-8703 ? analog devices, inc., 2000
amp04especifications electrical characteristics amp04e amp04f parameter symbol conditions min typ max min typ max unit offset voltage input offset voltage v ios 30 150 300 v e40 c t a +85 c 300 600 v input offset voltage drift tcv ios 36 v/ c output offset voltage v oos 0.5 1.5 3 mv e40 c t a +85 c3 6mv output offset voltage drift tcv oos 30 50 v/ c input current input bias current i b 22 30 40 na e40 c t a +85 c50 60na input bias current drift tci b 65 65 pa/ c input offset current i os 15 10na e40 c t a +85 c10 15na input offset current drift tci os 8 8 pa/ c input common-mode input resistance 4 4 g differential input resistance 4 4 g input voltage range v in 0 3.0 0 3.0 v common-mode rejection cmr 0 v v cm 3.0 v g = 1 60 80 55 db g = 10 80 100 75 db g = 100 90 105 80 db g = 1000 90 105 80 db common-mode rejection cmr 0 v v cm 2.5 v e40 c t a +85 c g = 1 55 50 db g = 10 75 70 db g = 100 85 75 db g = 1000 85 75 db power supply rejection psrr 4.0 v v s 12 v e40 c t a +85 c g = 1 95 85 db g = 10 105 95 db g = 100 105 95 db g = 1000 105 95 db gain (g = 100 k/r gain ) gain equation accuracy g = 1 to 100 0.2 0.5 0.75 % g = 1 to 100 e40 c t a +85 c 0.8 1.0 % g = 1000 0.4 0.75 % gain range g 1 1000 1 1000 v/v nonlinearity g = 1, r l = 5 k 0.005 % g = 10, r l = 5 k 0.015 % g = 100, r l = 5 k 0.025 % gain temperature coefficient g/ t 30 50 ppm/ c output output voltage swing high v oh r l = 2 k 4.0 4.2 4.0 v r l = 2 k e40 c t a +85 c 3.8 3.8 v output voltage swing low v ol r l = 2 k e40 c t a +85 c 2.0 2.5 mv output current limit sink 30 30 ma source 15 15 ma #$# (v s = 5 v, v cm = 2.5 v, t a = 25 c unless otherwise noted)
amp04 #%# amp04e amp04f parameter symbol conditions min typ max min typ max unit noise noise voltage density, rti e n f = 1 khz, g = 1 270 270 nv/ hz hz hz hz hz z z z z z z z z z h h
amp04 #&# amp04e amp04f parameter symbol conditions min typ max min typ max unit gain (g = 100 k/r gain ) gain equation accuracy g = 1 to 100 0.2 0.5 0.75 % g = 1000 0.4 0.75 % g = 1 to 100 e40 c t a +85 c 0.8 1.0 % gain range g 1 1000 1 1000 v/v nonlinearity g = 1, r l = 5 k 0.005 0.005 % g = 10, r l = 5 k 0.015 0.015 % g = 100, r l = 5 k 0.025 0.025 % gain temperature coefficient g/ t 30 50 ppm/ c output output voltage swing high v oh r l = 2 k 13 13.4 13 v r l = 2 k e40 c t a +85 c 12.5 12.5 v output voltage swing low v ol r l = 2 k e40 c t a +85 c e14.5 e14.5 v output current limit sink 30 30 ma source 15 15 ma noise noise voltage density, rti e n f = 1 khz, g = 1 270 270 nv/ hz hz hz hz hz z z z z z z h
amp04 #'# parameter symbol conditions limit unit g = 1000 80 db min power supply rejection psrr 4.0 v v s 12 v g = 1 85 db min g = 10 95 db min g = 100 95 db min g = 1000 95 db min gain (g = 100 k/r gain ) gain equation accuracy g = 1 to 100 0.75 % max output output voltage swing high v oh r l = 2 k 4.0 v min output voltage swing low v ol r l = 2 k 2.5 mv max power supply supply current i sy v s = 15 900 a max 700 a max note electrical tests and wafer probe to the limits shown. due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and test ing. absolute maximum ratings 1 supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 v common-mode input voltage 2 . . . . . . . . . . . . . . . . . . . 18 v differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . . 36 v output short-circuit duration to gnd . . . . . . . . . . indefinite storage temperature range z package . . . . . . . . . . . . . . . . . . . . . . . . . . e65 c to +175 c p, s package . . . . . . . . . . . . . . . . . . . . . . . . e65 c to +150 c operating temperature range amp04a . . . . . . . . . . . . . . . . . . . . . . . . . . e55 c to +125 c amp04e, f . . . . . . . . . . . . . . . . . . . . . . . . . e40 c to +85 c junction temperature range z package . . . . . . . . . . . . . . . . . . . . . . . . . . e65 c to +175 c p, s package . . . . . . . . . . . . . . . . . . . . . . . . e65 c to +150 c lead temperature range (soldering, 60 sec) . . . . . . . . 300 c package type ja 3 jc unit 8-lead cerdip (z) 148 16 c/w 8-lead plastic dip (p) 103 43 c/w 8-lead soic (s) 158 43 c/w notes 1 absolute maximum ratings apply to both dice and packaged parts, unless otherwise noted. 2 for supply voltages less than 18 v, the absolute maximum input voltage is equal to the supply voltage. 3 ja is s pecified for the worst case conditions, i.e., ja is specified for device in socket for cerdip, p-dip, and lcc packages; ja is specified for device soldered in circuit board for soic package. ordering guide temperature v os @ 5 v package package model range t a = 25 c description option amp04ep xind 150 v plastic dip n-8 amp04es xind 150 v soic so-8 amp04es-reel7 xind 150 v soic so-8 AMP04FP xind 300 v plastic dip n-8 amp04fs xind 300 v soic so-8 amp04fs-reel xind 150 v soic so-8 amp04fs-reel7 xind 150 v soic so-8 amp04gbc 25 c 300 v dice characteristics r gain 1 r gain 8 7 v+ 6 v out 5 ref e in 2 +in 3 v e 4 ()*&+,**-' *..-&$'/ +
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amp04 #8# applications common-mode rejection the purpose of the instrumentation amplifier is to amplify the difference between the two input signals while ignoring offset and noise voltages common to both inputs. one way of judging the device?s ability to reject this offset is the common-mode gain, which is the ratio between a change in the common-mode voltage and the resulting output voltage change. instrumenta- tion amplifiers are often judged by the common-mode rejection ratio, which is equal to 20 log 10 of the ratio of the u ser-selected differential signal gain to the common-mode gain, commonly called the cmrr. the amp04 offers excellent cmrr, guaran- teed to be greater than 90 db at gains of 100 or greater. input offsets attain very low temperature drift by proprietary laser- trimmed thin-film resistors and high gain amplifiers. input common-mode range includes ground the amp04 employs a patented topology (figure 1) that uniquely allows the common-mode input voltage to truly extend to zero volts where other instrumentation amplifiers fail. to illustrate, take for example the single supply, gain of 100 instrumentation amplifier as in figure 2. as the inputs approach zero volts, in order for the output to go positive, amplifier a?s output (v oa ) must be allowed to go below ground, to e0.094 volts. clearly this is not possi ble in a single supply environment. consequently this instrumentation amplifier configuration?s input common-mode voltage cannot go below about 0.4 volts. in comp arison, the amp04 has no such restriction. its inputs will function with a zero-volt common-mode voltage. in( e ) in(+) input buffers ref 100k 11k 11k r gain v out 100k 9
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0.01v + 20k v out 100k e 4.7 a 4.7 a 20k 0.01v 5.2 a 2127 100k v ob v oa 0v b a v in e 0.094v 0v 9
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input common-mode voltage below ground although not tested and guaranteed, the amp04 inputs are biased in a way that they can amplify signals linearly with common- mode voltage as low as e0.25 volts below ground. this holds true over the industrial temperature range from e40 c to +85 c. extended positive common-mode range on the high side, other instrumentation amplifier configurations, such as the three op amp instrumentation amplifier, can have severe positive common-mode range limitations. figure 3 shows an example of a gain of 1001 amplifier, with an input common- mode voltage of 10 volts. for this circuit to function, v ob must swing to 15.01 volts in order for the output to go to 10.01 volts. clearly no op amp can handle this swing range (given a 15 v supply) as the output will saturate long before it reaches the supply rails. again the amp04?s topology does not have this limitation. figure 4 illustrates the amp04 operating at the same common-mode conditions as in figure 3. none of the internal nodes has a signal high enough to cause amplifier saturation. as a result, the amp04 can accommodate much wider common- mode range than most instrumentation amplifiers. 100k r v ob v oa 10.00v a 10.01v 15.01v 5v r r r 50 a 100k 10.01v 200 b 9
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+15v e 15v 100k 11k v out 100k +15v e 15v 11k 100.1 a 11.111v 10.01v 10.00v 100 10.01v 0.1 a 10v 100 a 9
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amp04 #-# programming the gain the gain of the amp04 is programmed by the user by selecting a single external resistor?r gain : gain = 100 k / r gain the output voltage is then defined as the differential input voltage times the gain. v out = ( v in + e v in e ) gain in single supply systems, offsetting the ground is often desired for several reasons. ground may be offset from zero to provide a quieter signal reference point, or to offset zero to allow a unipolar signal range to represent both positive and negative values. in noisy environments such as those having digital switching, switching power supplies or externally generated noise, ground may not be the ideal place to reference a signal in a high accu- racy system. often, real world signals such as temperature or pressure may generate voltages that are represented by changes in polarity. in a single supply system the signal input cannot be allowed to go below gr ound, and therefore the signal must be offset to accom- modate this change in polarity. on the amp04, a reference input pin is pro vided to allow offsetting of the input range. the gain equation is more accurately represented by including this reference input. v out = ( v in + e v in e ) gain + v ref grounding the most common problems encountered in high performance analog instrumentation and data acquisition system designs are found in the management of offset errors and ground noise. primarily, the designer must consider temperature differentials and thermocouple effects due to dissimilar metals, ir volt- age drops, and the effects of stray capacitance. the problem is greatly compounded when high speed digital circuitry, such as that accompanying data conversion components, is brought into the proximity of the analog section. considerable noise and error contributions such as fast-moving logic signals that easily propagate into sensitive analog lines, and the unavoidable n oise common to digital supply lines must all be dealt with if the accu- racy of the carefully designed analog section is to be preserved. besides the temperature drift errors encountered in the ampli- fier, thermal errors due to the supporting discrete components should be evaluated. the use of high quality, low-tc compo- nents where appropriate is encouraged. what is more impo rtant, large thermal gradients can create not only unexpected changes in component values, but also generate significant thermoelec- tric voltages due to the interface between dissimilar metals such as lead solder, copper wire, gold socket contacts, kovar lead frames, etc. thermocouple voltages developed at these junctions commonly exceed the tcv os contribution of the amp04. component layout that takes into account the power dissipation at critical locations in the circuit and minimizes gradient effects and differential common-mode voltages by taking advantage of input symmetry w ill minimize many of these errors. high accuracy circuitry can experience considerable error con- trib utions due to the coupling of stray voltages into sensitive areas, including high impedance amplifier inputs which benefit from such techniques as ground planes, guard rings, and shields. careful circuit layout, including good grounding and signal routing practice to minimize stray coupling and ground loops is recommended. l eakage currents can be m inimized by using high quality socket and circuit board materials, and by carefully cleaning and coating complete board assemblies. as mentioned above, the high speed transition noise found in logic circuitry is the sworn enemy of the analog circuit designer. great care must be taken to maintain separation between them to minimize coupling. a major path for these error voltages will be found in the power supply lines. low impedance, load related variations and noise levels that are completely acceptable in the high thresholds of the digital domain make the digital supply unusable in nearly all high performance analog applications. the user is encouraged to maintain separate power and ground between the analog and digital systems wherever possible, joining only at the supply itself if necessary, and to observe careful grounding layout and bypass capacitor scheduling in sensitive areas. input shield drivers high impedance sources and long cable runs from remote trans- ducers in noisy industrial environments commonly experience significant amounts of noise coupled to the inputs. both stray capacitance errors and noise coupling from external sources can be minimized by running the input signal through shielded cable. the cable shield is often grounded at the analog input common, however improved dynamic noise rejection and a reduction in effective cable capacitance is achieved by driving the shield with a buffer amplifier at a potential equal to the voltage seen at the input. driven shields are easily realized with the amp04. examination of the simplified schematic shows that the potentials at the gain set resistor pins of the amp04 follow the inputs precisely. as shown in figure 5, shield drivers are easily realized by buffering the potential at these pins by a dual, single supply op amp such as the op213. alternatively, applica- tions with single-ended sources or that use twisted-pair cable could drive a single shield. to minimize error contributions due to this additional circuitry, all components and wiring should remain in proximity to the amp04 and careful grounding and bypassing techniques should be observed. v out 1/2 op213 1/2 op213 9
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amp04 #6# compensating for input and output errors to achieve optimal performance, the user needs to take into account a number of error sources found in instrumentation amplifiers. these consist primarily of input and output offset voltages and leakage currents. the input and output offset voltages are independent from one another, and must be considered separately. the input offset component will of course be directly multiplied by the gain of the amplifier, in contrast to the output offset voltage that is independent of gain. therefore, the output error is the domi- nant factor at low gains, and the input error grows to become the greater problem as gain is increased. the overall equation for offset voltage error referred to the output (rto) is: v os ( rto ) = ( v ios g ) + v oos where v ios is the input offset voltage and v oos the output offset voltage, and g is the programmed amplifier gain. the change in these error voltages with temperature must also be taken into account. the specification tcv os , referred to the output, is a combination of the input and output drift specifica- tions. again, the gain influences the input error but not the output, and the equation is: tcv os ( rto ) = (tcv ios
g) + tcv oos in some applications the user may wish to define the error con- tribution as referred to the input, and treat it as an input error. the relationship is: tcv os ( rti ) = tcv io s + ( tcv oos / g ) the bias and offset currents of the input transistors also have an impact on the overall accuracy of the input signal. the input leakage, or bias currents of both inputs will generate an addi- tional offset voltage when flowing through the signal source resistance. changes in this error component due to variations with signal voltage and temperature can be mini mized if both input source resistances are equal, reducing the e rror to a common-mode voltage which can be rejected. the difference in bias current between the inputs, the offset current, generates a differential error voltage across the source resistance that should be taken into account in the user?s design. in applications utilizing floating sources such as thermocouples, trans formers, and some photo detectors, the user must take care to provide some current path between the high imped- ance inputs and analog ground. the input bias currents of the amp04, although extremely low, will charge the stray capacitance found in nearby circuit traces, cables, etc., and cause the input to drift erratically or to saturate unless given a bleed path to the analog common. again, the use of equal resis- tance values w ill create a common input error voltage that is rejected by the amplifier. reference input the v ref input is used to set the system ground. for dual sup- ply operation it can be connected to ground to give zero volts out with zero volts differential input. in single supply systems it could be connected either to the negative supply or to a pseudo- ground between the supplies. in any case, the ref input must be driven with low impedance. noise filtering unlike most previous instrumentation amplifiers, the output stage?s inverting input (pin 8) is accessible. by placing a capaci- tor across the amp04?s feedback path (figure 6, pins 6 and 8) in( e ) in(+) input buffers ref 100k lp = 1 2 (100k ) c ext 11k 11k r gain v out 100k c ext 9
8 ! = a single-pole low-pass filter is produced. the cutoff frequency (f lp ) follows the relationship: f lp 1 2 (100 k ) c ext filtering can be applied to reduce wide band noise. figure 7a shows a 10 hz low-pass filter, gain of 1000 for the amp04. figures 7b and 7c illustrate the effect of filtering on noise. the photo in figure 7b shows the output noise before filtering. by adding a 0.15 f capacitor, the noise is reduced by about a factor of 4 as shown in figure 7c. 100k +15v e 15v 0.15 f 9
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< power supply considerations in dual supply applications (for example 15 v) if the input is connected to a low resistance source less than 100 , a large current may flow in the input leads if the positive sup ply is applied before the negative supply during power-up. a similar condition may also result upon a loss of the negative supply. if these c onditions could be present in you system, it is recom- mended that a series resistor up to 1 k be added to the input leads to limit the input current. this condition can not occur in a single supply environment as losing the negative supply effectively removes any current return path. offset nulling in dual supply offset may be nulled by feeding a correcting voltage at the v ref pin (pin 5). however, it is important that the pin be driven with a low impedance source. any measurable resistance will degrade the amplifier ? s common-mode rejection performance as well as its gain accuracy. an op amp may be used to buffer the offset null circuit as in figure 8. 8 7 6 5 1 2 3 4 amp04 ref v+ v e 5v e + input +5v e 5v 50k 100 50k 5mv adj range op90 for low power op113 for low drift e 5v output r g +5v e 5v 9
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+ offset nulling in single supply nulling the offset in single supply systems is difficult because the adjustment is made to try to attain zero volts. at zero volts out, the output is in saturation (to the negative rail) and the output voltage is indistinguishable from the normal offset error. consequently the offset nulling circuit in figure 9 must be used with caution. first, the potentiometer should be adjusted to ca use the output to swing in the positive direction; then adjust it in the reverse direction, causing the output to swing toward ground, until the output just stops changing. at t hat point the output is at the saturation limit. 8 7 6 5 1 2 3 4 amp04 5v input 100 output r g op113 50k 5v 9
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++ alternative nulling method an alternative null correction technique is to inject an offset current into the summing node of the output amplifier as in figure 10. this method does not require an external op amp. however, the drawback is that the amplifier will move off its null as the input common-mode voltage changes. it is a less desirable nulling circuit than the previous method. in( e ) in(+) input buffers ref 100k 11k 11k r gain v out 100k v e v+ 9
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amp04 #7*# application circuits low power precision single supply rtd amplifier figure 11 shows a linearized rtd amplifier that is powered from a single 5 volt supply. however, the circuit will work up to 36 volts without modification. the rtd is excited by a 100 a constant current that is regulated by amplifier a (op295). the 0.202 volts reference voltage used to generate the constant current is divided down from the 2.500 volt reference. the amp04 am pli- fies the bridge output to a 10 mv/ c output coefficient. r10 100 r2 26.7k r sense 1k v out full-scale adj 0 4.00v (0 c to 400 c) linearity adj. (@1/2 fs) notes: all resistors 0.5%, 25 ppm/ c all potentiometers 25 ppm/ c amp04 r8 383 r9 50 c1 0.47 f 1 7 3 2 4 5 8 6 1/2 op295 1/2 op295 r1 26.7k 500 r4 100 r6 11.5k r5 1.02k out ref43 in gnd 2.5v r7 121k 50k 4 5 6 8 7 5v 2 5v c2 0.1 f c3 0.1 f rtd 100 0.202v 6 4 1 2 3 r3 balance 5v a b 9
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the rtd is linearized by feeding a portion of the signal back to the reference circuit, increasing the reference voltage as the temperature increases. when calibrated properly, the rtd ? s nonlinearity error will be canceled. to calibrate, either immerse the rtd into a zero-degree ice bath or substitute an exact 100 resistor in place of the rtd. then adjust bridge balance potentiometer r3 for a 0 volt output. note that a 0 volt output is also the negative output swing limit of the amp04 powered with a single supply. therefore, be sure to adjust r3 to first cause the output to swing positive and then back off until the output just stops swinging negatively. next, set the linearity adj potentiometer to the midrange. substitute an exact 247.04 resistor (equivalent to 400 c temperature) in place of the rtd. adjust the full-scale potentiometer for a 4.000 volts output. finally substitute a 175.84 resistor (equivalent to 200 c temperature), and adjust the linearity adj potentiometer for a 2.000 volts at the output. repeat the full-scale and the half-scale adjustments as needed. when properly calibrated, the circuit achieves better than 0.5 c accuracy within a temperature measurement range from 0 c to 400 c. precision 4-20 ma loop transmitter with noninteractive trim figure 12 shows a full bridge strain gage transducer amplifier circuit that is powered off the 4-20 ma current loop. the amp04 amplifies the bridge signal differentially and is converted to a current by the output amplifier. the total quiescent current drawn by the circuit, which includes the bridge, the amplifiers, and the resistor biasing, is only a fraction of the 4 ma null current that flows through the current-sense resistor r sense . the voltage across r sense feeds back to the op90 ? s input, whose comm on-mode is fixed at the current sum ming reference voltage, thus regulating the output current. with no bridge signal, the 4 ma null is simply set up by the 50 k null potentiometer plus the 976 k resistors that inject an offset that forces an 80 mv drop across r sense . at a 50 mv full-scale bridge voltage, the amp04 amplifies the voltage-to-current converter for a full-scale of 20 ma at the output. since the op90 ? s input operates at a constant 0 volt common-mode voltage, the null and the span adjustments do not interact with one another. calibration is simple and easy with the null adjusted first, followed by span adjust. the entire circuit can be remotely placed, and powered from the 4-20 ma 2-wire loop. r sense 20 u1 amp04 5k 10-turn 2.49k 1 7 3 2 4 5 8 6 u2 op90 50mv fs 0.22 f 97.6k 3 2 b 976k 50k hp 5082-2810 220pf 4 6 100k 5% 2k 5% t1p29a 0.1 f 5.00v out ref02 n gnd u3 1n4002 4ma null 13.3k 15.8k 3500 strain gage bridge 7 20ma span 6 2 4 +v s 12v to 36v r load 100 4-20ma i null + i span unless otherwise specified, all resistors 1% or better potentiometer < 50 ppm/ c 9
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amp04 #77# 4-20 ma loop receiver at the receiving end of a 4-20 ma loop, the amp04 makes a convenient differential receiver to convert the current back to a usable voltage (figure 13). the 4-20 ma signal current passes through a 100 sense resistor. the voltage drop is differentially amplified by the amp04. the 4 ma offset is removed by the offset correction circuit. amp04 1k 3 2 4 6 v out 7 +15v e 15v 100 1% 1n4002 wire resistance 1k 4 e 20ma 4 e 20ma transmitter 100k power supply 0.15 f 4 e 20ma 0 e 1.6v fs 5 8 1 op177 2 3 ad589 e 15v 6 27k 10k e 0.400v 9
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low power, pulsed load-cell amplifier figure 14 shows a 350 load cell that is pulsed with a low duty cycle to conserve power. the op295 ? s rail-to-rail output capa- bility allows a maximum voltage of 10 volts to be applied to the bridge. the bridge voltage is selectively pulsed on when a mea- surement is made. a negative-going pulse lasting 200 ms should be applied to the measure input. the long pulsewidth is necessary to allow ample settling time for the long time constant of the low-pass filter around the amp04. a much faster settling time can be achieved by omitting the filter capacitor. amp04 3 2 v out 7 6 in gnd out ref01 1/2 op295 measure m m m m e m 0w 1s wh1nf11u 01o0i0 combining with the single supply adg221 quad analog switch, the amp04 makes a useful programmable gain amplifier that can handle input and output signals at zero volts. figure 15 shows the implementation. a logic low input to any of the gain control ports will cause the gain to change by shorting a gain- set resistor across amp04 ? s pins 1 and 8. trimming is required at higher gains to improve accuracy because the switch on- resistance becomes a more significant part of the gain-set resistance. the gain of 500 setting has two switches connected in parallel to reduce the switch resistance. 8 7 6 5 1 2 3 4 v e ref v+ r g r g amp04 adg221 13 10 9 7 8 15 16 2 1 12 5v to 30v v out 0.22 f 5 4 11 6 14 3 715 10.9k 200 200 0.1 f 10 f 5v to 30v gain of 500 gain of 100 gain of 10 wr e m 0w 1s 0g1w1 n foof1f0g1rgh5 wog 5f50ng1o0i0 the switch on resistance is lower if the supply voltage is 12 volts or higher. additionally, the overall amplifier ? s temperature coeffi- cient also improves with higher supply voltage.
amp04 #7$# 120 0 200 60 20 e 160 40 e 200 100 80 160 80 40 0 120 e 40 e 80 e 120 number of units input offset voltage e v t a = 25 c v s = 5v v cm = 2.5v based on 300 units 3 runs 9
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a' 2.50 0.25 0 2.25 1.75 1.50 1.25 2.00 1.00 0.75 0.50 tcv ios e v/ c 120 0 60 20 40 100 80 number of units 300 units v s = 5v v cm = 2.5v 9
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a' 2.0 e 1.6 e 2.0 1.6 0.8 0.4 0 1.2 e 0.4 e 0.8 e 1.2 output offset e mv 120 0 60 20 40 100 80 number of units t a = 25 c v s = 5v v cm = 2.5v based on 300 units 3 runs 9
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a' 0.5 e 0.4 e 0.5 0.4 0.2 0.1 0 0.3 e 0.1 e 0.2 e 0.3 input offset voltage e mv 120 0 60 20 40 100 80 number of units t a = 25 c v s = 15v v cm = 0v based on 300 units 3 runs 9
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a 7' 2.50 0.25 0 2.25 1.75 1.50 1.25 2.00 1.00 0.75 0.50 tcv ios e v/ c 120 0 60 20 40 100 80 number of units 300 units v s = 15v v cm = 0v 9
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a 7' 5 e 4 e 54 2 1 03 e 1 e 2 e 3 output offset e mv 120 0 60 20 40 100 80 number of units t a = 25 c v s = 15v v cm = 0v based on 300 units 3 runs 9
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amp04 #7%# 20 2 018 14 12 10 16 8 6 4 tcv oos e v/ c 120 0 60 20 40 100 80 number of units 300 units v s = 5v v cm = 0v 9
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a' temperature e c 5.0 3.8 100 4.4 4.0 e 25 4.2 e 50 4.8 4.6 75 50 25 0 output voltage swing e volts v s = 5v r l = 100k r l = 2k r l = 10k 9
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a' 40 0 100 10 5 e 25 e 50 20 15 25 30 35 75 50 25 0 input bias current e na temperature e c v s = 5v v s = 15v v s = 5v, v cm = 2.5v v s = 15v, v cm = 0v 9
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120 0 60 20 40 100 80 number of units 300 units v s = 15v v cm = 0v 20 218 14 12 10 16 8 6 4 tcv oos e v/ c 22 24 9
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a 7' 15.0 e 15.1 100 e 14.8 e 15.0 e 25 e 14.9 e 50 12.5 e 14.7 e 14.6 13.0 13.5 14.0 14.5 75 50 25 0 temperature e c +output swing e volts v s = 5v r l = 100k r l = 2k r l = 10k e output swing e volts r l = 2k r l = 10k r l = 100k 9
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a 47' 8 6 0 4 2 100 e 25 e 50 75 50 25 0 input offset current e na temperature e c v s = 5v v s = 15v v s = 5v, v cm = 2.5v v s = 15v, v cm = 0v 9
$- < 3
5

amp04 #7&# 50 30 e 20 1k 1m 100k 10k 100 40 10 20 e 10 0 frequency e hz voltage gain e db g = 1 g = 100 g = 10 t a = 25 c v s = 15v 9
$6 3 >= :9
/ 1 10 100k 10k 1k 100 frequency e hz 100 e 20 60 80 0 40 common-mode rejection e db 20 120 t a = 25 c v s = 15v v cm = 2v p-p g = 100 g = 10 g = 1 9
$. 3 >( @ 9
/ 10 100k 10k 1k 100 frequency e hz 100 60 80 0 40 power supply rejection e db 20 120 t a = 25 c v s = 15v v s = 1v g = 100 g = 10 g = 1 140 1m 9
%* ) )
+ @ 9
/ 100 e 20 1k 100k 10k 100 60 80 0 40 frequency e hz output impedance e 10 20 120 v s = 15v v s = 5v t a = 25 c g = 1 9
%7 3 >= < 9
/ common-mode rejection e db 120 70 50 110 1k 100 100 60 80 90 110 voltage gain e g t a = 25 c v s = 15v v cm = 2v p-p 9
%$ 3 >( @ : 10 100k 10k 1k 100 frequency e hz 100 60 80 0 40 power supply rejection e db 20 120 t a = 25 c v s = 15v v s = 1v g = 100 g = 10 g = 1 140 1m 9
%% ! )
+ @ 9
/
amp04 #7'# voltage gain e g 1 110 t a = 25 c v s = 15v = 100hz voltage noise e nv/ hz 0w 1s an5f1n0h1gh051hs1f0g a hz 0w 1s an5f1n0h1gh051hs1 wg a e 0w 1s w1w g51hs1o f5w a ggg hz 0w 1s an5f1n0h1gh051hs1f0g1i111 20mv 1s v s = 15v, gain = 1000, 0.1 to 10 hz bandpass 9
%6 ! 1k 100k 10k 100 0 load resistance e output voltage e v 10 t a = 25 c v s = 15v 2 4 6 8 10 12 14 16 9
%.(b< =
amp04 #78# 3**$'*#*#77c**0
2 )!5!?+ outline dimensions dimensions shown in inches and (mm). 8-lead plastic dip (n-8) seating plane 0.060 (1.52) 0.015 (0.38) 0.210 (5.33) max 0.022 (0.558) 0.014 (0.356) 0.160 (4.06) 0.115 (2.93) 0.070 (1.77) 0.045 (1.15) 0.130 (3.30) min 8 14 5 pin 1 0.280 (7.11) 0.240 (6.10) 0.100 (2.54) bsc 0.430 (10.92) 0.348 (8.84) 0.195 (4.95) 0.115 (2.93) 0.015 (0.381) 0.008 (0.204) 0.325 (8.25) 0.300 (7.62) 8-lead cerdip (q-8) 1 4 85 0.310 (7.87) 0.220 (5.59) pin 1 0.005 (0.13) min 0.055 (1.4) max 0.100 (2.54) bsc 15 ? 0 ? 0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.008 (0.20) seating plane 0.200 (5.08) max 0.405 (10.29) max 0.150 (3.81) min 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.070 (1.78) 0.030 (0.76) 0.060 (1.52) 0.015 (0.38) 8-lead narrow-body so (so-8) 85 4 1 0.1968 (5.00) 0.1890 (4.80) 0.2440 (6.20) 0.2284 (5.80) pin 1 0.1574 (4.00) 0.1497 (3.80) 0.0500 (1.27) bsc 0.0688 (1.75) 0.0532 (1.35) seating plane 0.0098 (0.25) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.0098 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 8 0 0.0196 (0.50) 0.0099 (0.25) 45

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